The present invention relates to an input output control device for receiving and transmitting data within a computer network, and especially, to a device for receiving, generating, and transmitting frame data beyond the borders of the computer network.
In the field of very high speed data links, there is dramatic technological development. The data communications industry is setting its sight on high-performance computers. Performance-related requirements and improvements have given birth to uses employing data-intensive high-speed networks, such as multimedia, the visualization of scientific phenomena and expanded network designs. And then, it is desired to attain even higher speeds for the network interconnection between computers and input output devices as well.
Fibre Channel (FC) was developed in order to provide a practical and low-cost, yet extensible, means for transferring data swiftly between workstations, mainframes, supercomputers, desktop computers, storage devices, network servers, and other peripheral equipment. Fibre Channel is a general name for a collection of standards, consolidating standards prepared by the American National Standards Institute (ANSI), the related specifications for which are disclosed on the http://www.t11.org/ site et cetera. Also, in order to make possible even higher-speed data links, the 802.3ae specification, which implements a link speed of 10 Gbps, was established by The Institute of Electrical and Electronics Engineers (IEEE) in 2002, and using this as a base, the 10GFC specification is in the process of becoming standardized in the IEEE.
As a means of connecting this fibre channel with the host processor, the configuration using the Peripheral Component Interchange (PCI) standard established by the PCI-SIG (Special Interest Group) is widely used, and a Fibre Channel Host Bus Adapter (HBA) is offered in the market by each vendor. Also, it is common that these HBAs are equipped with a protocol processor for interpreting the Fibre Channel Protocol and controlling data transfers to and from the Main Storage (MS) device.
Now, the effective utilization of the host bus has been raised as a market demand in recent years. For example, as far as the aforementioned PCI host bus is concerned, it is demanded that the number of connections be determined per bus segment and that several fibre channels be connected on a single HBA in order to utilize the PCI bus effectively. Concerning the HBAs offered in the market, as a first method implementing a plurality of fibre channels on one adapter, a method has been adopted which provides input output control devices such as that described in the JP-A-1993-334223 official report, for two channels, with a single interface and a single protocol processor, and which also provides a PCI bridge in order to separate the system-side and HBA-internal bus segments.
In addition, there is also a second method consisting in integrating into a single LSI (Large Scale Integration) circuit a plurality of completely independent fibre channel control circuits, taking advantage of highly integrated LSI circuits made available by the progress of technology. If one has recourse to this method, it is sufficient just to integrate independent logic circuit cores into a single LSI circuit.